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BH3865S video ics dual-line serial control sound processor ic BH3865S the BH3865S is a signal processing ic developed for the control of volume and tone quality in tv equipment. since dual-line serial control (i 2 c bus) is used, the volume level and tone quality in tv equipment can be changed using signals such as those from a microcomputer or similar device. note : i 2 c bus is a registered trademark of philips. ! ! ! ! applications dvds, personal computers, high-vision tvs, karaoke sets, digital broadcasts, catvs, and other tv equipment ! ! ! ! features 1) 2-channel volume and sound quality control. 2) absorption of volume deviation between input sources and improved s / n ratio, for better sound quality, using an agc circuit. 3) control through i 2 c bus serial control. 4) internal pseudo-stereo circuit provides phase-shift matrix surround effect. ! ! ! ! absolute maximum ratings (ta = 25 c) parameter symbol limits unit power supply voltage v cc 10.0 v power dissipation 1250 ? mw operating temperature topr c storage temperature tstg c pd ? 25~+75 ? 55~+125 ? reduced by 12.5mw for each increase in ta of 1 ?c over 25?c. ! ! ! ! recommended operating conditions (ta = 25 c) parameter symbol min. typ. max. unit power supply voltage v cc 7.0 - 9.5 v 4 .com u datasheet
BH3865S video ics ! ! ! ! block diagram 32 1 17 16 l in r in 31 v cc gnd 30 29 add ls1 28 b in ls2 27 ms in s out 26 bgain ps 25 stt v ref stt r out 24 lt stb 23 lb rt lb rb 22 21 20 l out srv l out slv l out scl 19 18 agcadj 23456789101112131415 dac sda vca agc mix off mix on bass off surr effect on off on off on off on son off on sste loop smon l + r phase shift l + s 10k 10k 10k 10k 50k 50k 10k 50k 50k 50k 50k 10k 10k vca r - s l - r lfp amp v cc v cc i 2 c bus scl sda interface volume volume volume volume addition addition tone (bass/treble) tone (bass/treble) a g c 2 1 v cc ! ! ! ! pin descriptions pin no. pin name function 1 r in rch input pin no. pin name function 17 dac expansion dac (l / h) 2 gnd ground 18 n.c. no connection 3 agcadj agc 0db adjustment 19 n.c. no connection 4 ls1 agc level sensor 1 20 l out lch output 5 ls2 agc level sensor 2 21 n.c. no connection 6 s out sch output pin and lpf 22 n.c. no connection 7 ps phase shift pin (internal resistance:18k ? ) 23 lb lch bass fc setting 8 vref 1 / 2 v cc 24 lt lch treble fc setting 9 stb bass shock sound integration 25 stt treble shock sound integration 10 rt rch treble fc setting 26 bgain bass mix gain adjustment 11 rb rch bass fc setting 27 ms in mono sur input 12 r out rch output 28 b in bass detection lpf operating amplifier input 13 srv vol rch shock sound integration 29 add l + r added output after agc 14 slv vol lch shock sound integration 30 n.c. no connection 15 scl i 2 c communications clock 31 v cc power supply, 9v 16 sda i 2 c communications data 32 l in lch input 4 .com u datasheet
BH3865S video ics ! ! ! ! input / output circuits pin no. input pins. pin name i / o z in pin voltage equivalent circuit function agc 0db adjustment pin. this pin is connected to the base of pnp. the current output from this pin is 1 a (typ.) max. 3-i agcadj output pins. 12 4.5v o r out 20 l out time constant pin on the side that suppresses the agc signal level. 4--- ls1 4.5v 50k - - i 1 r in 32 l in v cc gnd 50k 1 2 v cc v cc gnd 200 200 10k v cc gnd v cc gnd 200 430 2k 4 .com u datasheet
BH3865S video ics pin no. 5--- ls2 pin name i / o z in pin voltage equivalent circuit function 7--- ps serves as both the output pin for the surround and pseudo- stereo effects, and the lpf pin. for the phase-shifter filter for the surround and pseudo- stereo effects. 6 4.5v 10k o s out 1 / 2 v cc . this voltage serves as the power supply for the signal system. time constant pin on the side that amplifies the agc signal level. 8 4.5v - - vref v cc gnd 200 20k 2k v cc gnd 200 200 10k v cc gnd 10k 18k 10k 18k 50k 50k v cc gnd 4 .com u datasheet
BH3865S video ics pin no. pin name i / o z in pin voltage equivalent circuit function treble filter pins for the left and right channels. integration pins that prevent shock sound when switching the bass and treble levels. 25 - 30k - stt 9 stb 4.5v 30k - 24 lt 10 rt bass filter pins for the left and right channels. 4.5v 30k - 23 lb 11 rb integration pins that prevent shock sound when switching the volume levels on the left and right channels. 14 - 30k - slv 13 srv v cc gnd 30k dac v cc gnd 30k 1 2 v cc v cc gnd 30k 1 2 v cc v cc gnd 30k dac 4 .com u datasheet
BH3865S video ics v cc gnd pin no. scl pin for the i 2 c bus. this is the clock pin. 15 - - i scl pin neme i / o z in pin voltage equivalent circuit function 50k 1 2 v cc 17 0 / 5 - o dac v cc gnd 200 100k 25.6k 74.6k 16 - - -- i sda gain adjustment pin used to mix the bass on the left and right channels. 26 4.5v bgain v cc gnd control logic sda pin for the i 2 c bus. the ackowledge signal is output from this pin. this is the data pin. 0v and 5v output pin that enables control with the i 2 c bus. v cc gnd b in 10k 4 .com u datasheet
BH3865S video ics pin no. surround input section for monaural signals in the surround section. bass signal input to the left and right channels. 27 4.5v 50k i ms in pin name i / o z in pin voltage equivalent circuit function 50k 1 2 v cc 29 4.5v - o add 28 4.5v 50k i b in power supply pin. ground pin. 31 9v - - v cc 20v-- gnd incremented output from the left and right channels following agc. v cc gnd bgain 50k 1 2 v cc 10k 1 2 v cc v cc gnd v cc gnd 200 200 10k - - 4 .com u datasheet
BH3865S video ics ! ! ! ! electrical characteristics (unless otherwise noted, ta = 25 c, v cc = 9v, f = 1khz, r g = 600 ? , r l = 10k ? ) 1 ? 1k 1 ? 1k (1- ) 50k (1- ) 50k v rr v rr parameter symbol conditions i q quiescent circuit current v in = 0v rms v omr max. output voltage, rch max. output voltage, lch v oml min. - 2.1 2.1 typ. 27 2.5 2.5 max. 45 - - unit ma v rms v rms f inr = 1khz, v in = 1v rms , r inr = thd = 1% ( ) ( / v in ) g vr voltage gain, rch voltage gain, lch ? 1.5 0 1.5 db v in = 1v rms , g vr = 20log g vl ? 1.5 0 1.5 db v in = 1v rms , g vl = 20log thd r total harmonic distortion,rch total harmonic distortion,lch thd l - - 0.01 0.01 0.1 0.1 % % v in = 1v rms v in = 1v rms v nor output noise voltage, rch output noise voltage, lch v nol - - 35 35 70 70 v rms v rms r g = 0 ?, din audio r g = 0 ? , din audio v mnor residual noise voltage, rch residual noise voltage, lch v mnol - - 3 3 10 10 v rms v rms r g = 0 ? , din audio r g = 0 ? , din audio ( r / l ) ct r-l crosstalk, rch lch crosstalk, lch rch input impedance, rch input impedance, lch 70 78 - db v in = 1v rms , ct r-l = 20log ct l-r 70 78 - db v in = 1v rms , ct l-r = 20log r inr 35 50 65 k ? f inl = 1khz, v in = 1v rms , r inl = r inl 35 50 65 k ? f outr = 1khz, r outr = output impedance, rch output impedance, lch r outr --50 ? f rr = 100hz, v rr = 100mv rms , ripple rejection, rch ripple rejection, lch rr r 40 53 - db f outl = 1khz, r outl = r outl --50 ? rr r = 20log v in v in v in v in muting level, rch muting level, lch v muter 80 90 - db v in = 1v rms , v muter = 20log v mutel 80 90 - db v in = 1v rms , v mutel = 20log f rr = 100hz, v rr = 100mv rms , rr l 40 53 - db rr l = 20log thd = 1% ( ) volume attenuation, rch volume attenuation, lch channel balance 1, rch lch att maxr 80 90 - db v in = 1v rms , att maxr = 20log att maxl 80 90 - db v in = 1v rms , att maxl = 20log cb 1r-l ? 1.5 0 1.5 db v in = 1v rms , cb 1r-l = 20log compartion with f = 100hz, v in = 100mv rms, bass flat r l r l channel balance 2, rch lch cb 2r-l ? 2.0 0 2.0 db v in = 1v rms , cb 2r-l = 20log bass boost gain, rch bass boost gain, lch vb maxr 13 15.5 18 db compartion with f = 100hz, v in = 100mv rms, bass flat vb maxl 13 15.5 18 db compartion with f = 100hz, v in = 100mv rms, bass flat bass cut gain, rch bass cut gain, lch vb minr ? 18 ? 15.5 ? 13 db compartion with f = 100hz, v in = 100mv rms, bass flat vb minl ? 18 ? 15.5 ? 13 db compartion with f = 10khz, v in = 100mv rms, bass flat treble boost gain, rch treble boost gain, lch vt maxr 91215db compartion with f = 10khz, v in = 100mv rms, bass flat vt maxl 9 12 15 db ( / v in ) ( l / r ) 4 .com u datasheet
BH3865S video ics / v in / v in / v in / v in / v in / v in / v in / v in / v in parameter symbol conditions min. typ. max. unit comparison with f=10khz, v in =100mv rms , bass flat treble cut gain, rch treble cut gain, lch vt minr ? 15 ? 12 ? 9db agc input / output level 1, rch agc input / output level 1, lch v agc1r 0.7 1 1.4 mv rms v in =1mv rms comparison with f=10khz, v in =100mv rms , bass flat vt minl ? 15 ? 12 ? 9db v agc1l 0.7 1 1.4 mv rms v in =1mv rms agc input / output level 2, rch agc input / output level 2, lch v agc2r 50 80 110 mv rms v in =50mv rms v agc2l 50 80 110 mv rms v in =50mv rms agc input / output level 3, rch agc input / output level 3, lch v agc3r 90 130 170 mv rms v in =110mv rms agc input / output level 4, rch v agc4r 160 210 260 mv rms v in =1v rms v agc3l 90 130 170 mv rms v in =110mv rms agc input / output level 4, lch total harmonic distortion at agc on, rch total harmonic distortion at agc on, lch v agc4l 160 210 260 mv rms v in =1v rms thd agcr - 0.4 1 % v in =200mv rms thd agcl - 0.4 1 % v in =200mv rms max. surround gain, rch max. surround gain, lch v sumaxr 468db v in =100mv rms , v sumaxr =20log v sumaxl 468db v in =100mv rms , v sumaxl =20log min. surround gain, rch min. surround gain, lch v suminr 0 1 3.5 db v in =100mv rms , v suminr =20log v suminl 0 1 3.5 db v in =100mv rms , v suminl =20log bass add on gain, rch bass add on gain, lch v baonr 7.5 10 12.5 db f=100hz, v in =100mv rms , v baonr =20log v baonl 7.5 10 12.5 db f=100hz, v in =100mv rms , v baonl =20log pseudo-stereo gain, rch pseudo-stereo gain, lch v monr ? 6.5 ? 4 ? 1.5 db v in =100mv rms , v monr =20log dac pin operating voltage 1 v dac1 4.7 5 5.3 v dac pin operating voltage 2 v dac2 - 0 0.3 v scl and sda pin input high level v ihi 3.5 - 5 v scl and sda pin input low level v ilo - - 0.9 v v monl 1.5 4 6.5 db v in =100mv rms , v monl =20log surround gain at loop on, rch surround gain at loop on, lch v lpsur 1.5 4 6.5 db v in =100mv rms , v lpsur =20log v lpsul 1.5 4 6.5 db v in =100mv rms , v lpsul =20log ? the phase are the same between the input and output signal pins. / v in 4 .com u datasheet
BH3865S video ics ! ! ! ! measurement circuit 400hz ~ 30khz bw = l in r in v cc gnd agcadj add ls1 b in ls2 ms in s out bgain ps stt v ref lt stb lb rt rb r out l out srv slv scl dac sda 32 31 1 30 3 29 4 28 5 27 6 26 7 25 8 24 9 23 10 22 11 21 12 20 13 19 14 18 15 17 16 BH3865S fig.1 15k 10 0.33 0.1 0.1 0.0056 100 4.7k 100k 18k s3 2 1 v cc 2 s1 47k 0.039 2 1 s7 0.033 0.33 0.1 100 0.022 22 2k 470p 1 2 s9 5v 2k 1 2 s6 2 1 s2 50k rg: 50 ? ? 4.7 220k ? ? ? 470p ? 0.033 ? ? ? ? 1 2 a e v d h v b c f g rg: 50 1k 10k 5k 20k 5v 2.2 2.2 f out thd s10 2 1 s11 2 1 ? ? ? 0.022 ? ? ? ? ? ? ? ? ? ? ? 1 10k 50k 10k 2 1 s4 v cc v cc rr ? v j i 50 100 rg: 50 v a v v a v i 2 c bus serial input precautions concerning wiring 1) a bare ground should be used for gnd. 2) the wiring pattern of the i 2 c bus should be separate from that of the analog unit, to avoid crosstalk. 3) parallel positioning of the scl and sda lines of the i 2 c bus should be avoided wherever possible. if they are adjacent, they should be shielded. recommended attachments 1) elements marked with an asterisk 2) unless otherwise noted, the following attachments should be used. carbon-sheathed resistors : 1% film capacitors : 1% carbon-sheathed resistors : 5% film capacitors : 20% ceramic capacitors : 1% ! ! ! ! measurement circuit switch operation parameter symbol i q quiescent circuti current v omr v oml 123456789 10 11 00010203040506 slave address msb lsb 1 11 11 1 ffff 2020000c 1121 21 11 00ff 2020000c 1112 12 11 ff00 2020000c 1121 21 11 00ff 2020000c 1112 12 11 ff00 2020000c g vr g vl 10000010 sw no. i 2 c bus selected address / data measurement point max. output voltage, rch max. output voltage, lch voltage gain, rch voltage gain, lch b b b b i 4 .com u datasheet
BH3865S video ics 1 2 / 2 1 / 2 1 / 1 2 / parameter symbol 123456789 10 11 00010203040506 msb lsb 1121 21 11 00ff 2020000c 1112 12 11 ff00 2020000c 1111 21 11 00ff 2020000c 1111 12 11 ff00 2020000c 1111 21 11 0000 2020000c 1111 12 11 0000 2020000c 1121 12 11 ffff 2020000c 1112 21 11 ffff 2020000c 1221 11 11 0000 2020000c 1212 11 11 0000 2020000c 1111 21 21 0000 2020000c 1111 12 21 0000 2020000c 2111 21 11 00ff 2020000c thd r total harmonic distortion, rch total harmonic distortion, lch thd l v nor output noise voltage, rch output noise voltage, lch v nol v mnor residual noise voltage, rch residual noise voltage, lch v mnol ct r-l crosstalk, rch lch crosstalk, lch rch input impedance, rch input impedance, lch ct l-r 2111 12 11 ff00 2020000c 1121 21 11 ffff 2020000e 1112 12 11 ffff 2020000e 1121 21 11 0000 2020000c 1112 12 11 0000 2020000c 1122 11 ffff 2020000c 1122 11 3333 2020000c 1121 21 11 00ff 7f20000c r inr r inl output impedance, rch output impedance, lch r outr ripple rejection, rch ripple rejection, lch rr r r outl muting level, rch muting level, lch v muter v mutel rr l 10000010 sw no. i 2 c bus volume attenuation, rch volume attenuation, lch att maxr att maxl channel balance 1, rch lch cb 1r-l channel balance 2, rch lch cb 2r-l bass boost gain, rch bass boost gain, lch vb maxr slave address selected address / data 1112 12 11 ff00 7f20000c 1121 21 11 00ff 0020000c 1112 12 11 ff00 0020000c 1121 21 11 00ff 207f000c 1112 12 11 ff00 207f000c 1121 21 11 00ff 2000000c 1112 12 11 ff00 2000000c 1122 21 11 ffff 20200001 1122 12 11 ffff 20200001 1122 21 11 ffff 20200001 1122 12 11 ffff 20200001 1122 21 11 ffff 20200001 1122 12 11 ffff 20200001 1122 21 11 ffff 20200001 1122 12 11 ffff 20200001 1122 21 11 ffff 20200001 vb maxl bass cut gain, rch bass cut gain, lch vb minr vb minl treble boost gain, rch treble boost gain, lch vt maxr vt maxl treble cut gain, rch treble cut gain, lch vt minr agc input / output level 1, rch agc input / output level 1, lch v agc1r vt minl v agc1l agc input / output level 2, rch agc input / output level 2, lch v agc2r v agc2l agc input / output level 3, rch agc input / output level 3, lch v agc3r agc input / output level 4, rch agc input / output level 4, lch v agc4r v agc3l total harmonic distortion at agc on, rch v agc4l thd agcr 1122 12 11 ffff 20200001 total harmonic distortion at agc on, lch thd agcl measurement point b b b b b d d b b b b b b b b b b b b b b b b b b b b b b b b c c c c a a c 4 .com u datasheet
BH3865S video ics parameter symbol 123456789 10 11 00010203040506 msb lsb 1121 21 11 00ff 2020cf00 1112 12 11 ff00 2020cf00 1121 21 11 00ff 2020c000 1112 12 11 ff00 2020c000 1121 21 11 00ff 2020d600 1112 12 11 ff00 2020d600 1121 21 11 00ff 20200010 1112 12 11 ff00 20200010 1122 21 11 ffff 2020af00 1122 12 11 ffff 2020af00 1111 11 1210000 20200020 1111 11 1220000 20200000 1111 11 11 1111 11 11 10000010 sw no. i 2 c bus max. surround gain, rch max. surround gain, lch v sumaxr v sumaxl min. surround gain, rch min. surround gain, lch v suminr v suminl bass add on gain, rch bass add on gain, lch v baonr v baonl pseudo-stereo gain, rch pseudo-stereo gain, lch v monr dac pin operating voltage 1 v dac1 dac pin operating voltage 2 v dac2 scl and sda pin input high level v ihi scl and sda pin input low level v ilo v monl surround gain at loop on, rch surround gain at loop on, lch v lpsur v lpsul slave address selected address / data measurement point b b b b b b b b b b f e f e h h 4 .com u datasheet
BH3865S video ics ! ! ! ! data setting methods (1) i 2 c bus timing parameter clock frequency range f scl 0 100 khz the high period of the clock t high 4 the low period of the clock t low t r - - -- 4.7 - s s scl rise time - -1 s symbol min. typ. max. unit t f t su ; sta t su ; sto t su ; dat scl fall time - - 0.3 s set-up time for start condition 4.7 - - s hold time for start condition t hd ; sta 4- - s time bus must be free before a new transmission can start t buf 4.7 250 - - - - s ns set-up time for stop condition 4.7 - - s set-up time data t su ; sta = start code set -up time. t buf = bus free time. t hd ; sta = start code hold time. t su ; dat = data a set-up time. t hd ; dat = data a hold time. t su ; sto = stop code set -up time. t low t r scl sda start condition sda stop condition sda t su ; da t su ; st t hd ; st t su ; st t buf t hig t hd ; da t f fig.2 timing requirements for i 2 c bus the above characteristics are logical values in the ic design, and are not guaranteed based on the shipping inspection. any problems that may arise will be handled through mutual discussion in good faith. 4 .com u datasheet
BH3865S video ics (2) i 2 c bus data format slave address msb 1-bit 1-bit 1-bit 1-bit 1-bit 8-bit 8-bit 8-bit lsb msb lsb msb lsb selected address data sa aap ? s = start condition (recognition of start bit) ? slave address = recognition of ic. first 7 bit may consist of any data. the last bit must be low for writing purposes. ? a = acknowledge bit (recognition of recognition response) ? selected address = selection of volume, bass, treble, or matrix surround. ? data = various items of volume and sound quality data. ? p = stop condition (recognition of stop bit) (3) interface protocol 1) basic format msb lsb msb lsb msb lsb sa aap slave address selected address data 2) auto increment (the selected address is incremented (+1) by the number of data) msb lsb msb lsb msb lsb data 1, data 2, ..., data n sa a ap slave address selected address (example 1) data 1 is set as the data of the address specified by the ?selected address? parameter. (example 2) data 2 is set as the data of the address specified by the ?selected address? parameter + 1. (example n) data n is set as the data of the address specified by the ?selected address? parameter + n - 1. 3) configuration which cannot be transmitted (in this case, only selected address 1 is set) msb lsb msb lsb msb lsb msb lsb msb lsb saa a aap slave address selected address 1 selected address 2 data data caution : if selected address 2 was sent as data following the data parameter, the contents will be recognized as data, and not as selected address 2. (4) BH3865S slave address a6 1 a5 0 a4 0 a3 0 a2 0 a1 0 r / w 0 a0 1 msb lsb the above slave address has been registered with philips corporation. 4 .com u datasheet
BH3865S video ics (5) selected addresses msb selected address set address lch volume rch volume tone (bass) tone (treble) surround agc - a6 0 0 0 0 0 0 0 a7 0 0 0 0 0 0 0 0 1 2 3 4 5 6 a5 0 0 0 0 0 0 0 a4 0 0 0 0 0 0 0 a3 0 0 0 0 0 0 0 a2 0 0 0 0 1 1 1 a1 0 0 1 1 0 0 1 a0 0 1 0 1 0 1 0 lsb when sending continuous data, the auto increment function moves through the selected addresses in the following sequence. 0123456 4 .com u datasheet
BH3865S video ics (6) data msb surround effect data lch vol rch vol - l / r bass l / r treble selected address set item lch volume rch volume tone (bass) tone (treble) surround agc - a6 sste ? a7 ? son ? 00h 01h 02h 03h 04h 05h 06h a5 smon dac a4 loop bass a3 ? a2 ? a1 mute a0 agc lsb selected address 00h 01h contents volume : all h : att 0db all l : ? (95db) 1.0db step level loop sste smon son mute agc bass dac h : on / l : off h : on / l : off h : on / l : off h : on / l : off h : on / l : off h : on / l : off h : mix on / l : mix off h : h out / l : l out switch that varies the stage of the phase shift on / off switch for (l ? r) signal (stereo surround) on / off switch for (l + r) signal (pseudo-stereo) on / off switch for surrond effect muting switch agc on / off switch low-pitch range mixing switch 0v or 5v output switch bass / tre : all h : max. (full boost) all l : min. (full cut) surr effect : (broad gain adjustment) all h : max. (15db) all l : min. (0db) 1db step 03h 04h 05h 06h 4 .com u datasheet
BH3865S video ics (7) volume and amount of attenuation (reference examples) att (db) 0 ? 1 ? 2 ? 3 ? 4 ? 5 ? 6 ? 7 ? 8 ? 9 ? 10 ? 11 ? 12 ? 13 ? 14 ? 15 ? 16 ? 17 ? 18 ff c4 ad 9f 93 8a 82 7b 75 6f 6a 66 61 5d 5a 56 53 50 4d 4a 48 43 3e 3a 36 33 30 2d 2a 27 25 23 21 1f 1d 1b 19 18 16 15 14 13 12 10 0f 0e 0d 0c 0b 09 00 data (hex) att (db) ? 19 ? 20 ? 22 ? 24 ? 26 ? 28 ? 30 ? 32 ? 34 ? 36 ? 38 ? 40 ? 42 ? 44 ? 46 ? 48 ? 50 ? 52 ? 54 data (hex) att (db) ? 56 ? 58 ? 60 ? 62 ? 63 ? 67 ? 68 ? 70 ? 73 ? 76 ? 78 ? 84 ? data (hex) caution : the settings in the above table are reference values. when using them, make sure values are confirmed carefully before being set. 4 .com u datasheet
BH3865S video ics (8) bass and treble gain settings (reference examples) step i 2 c data (hex) bass gain (db) treble gain (db) table 5 : tone microcomputer data (the gain value is given as a guide). 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 7f 36 34 32 31 30 2f 2e 2d 2c 2b 2a 29 28 27 20 15.9 15.2 14.3 13.0 12.2 11.3 10.4 9.3 8.0 6.7 5.3 4.0 2.9 1.8 1.1 0.0 12.0 11.2 10.4 9.2 8.5 7.6 6.8 5.8 4.8 3.8 2.9 2.0 1.4 0.8 0.4 0.0 step i 2 c data (hex) bass gain (db) treble gain (db) ? 1 ? 2 ? 3 ? 4 ? 5 ? 6 ? 7 ? 8 ? 9 ? 10 ? 11 ? 12 ? 13 ? 14 ? 15 18 17 16 15 14 13 12 11 10 0f 0e 0d 0b 09 00 ? 1.5 ? 2.4 ? 3.4 ? 4.6 ? 5.8 ? 7.1 ? 8.3 ? 9.5 ? 10.6 ? 11.5 ? 12.3 ? 13.0 ? 14.2 ? 15.0 ? 15.6 ? 0.8 ? 1.3 ? 2.0 ? 2.8 ? 3.7 ? 4.7 ? 5.7 ? 6.6 ? 7.5 ? 8.3 ? 9.0 ? 9.6 ? 10.6 ? 11.3 ? 11.8 caution (1) the gain values given in the table above for treble and bass data are the data when the filter constant is specified such that the peak and bottom values on the frequency characteristic diagram will be at the maximum and minimum gain levels. (2) the settings in the above table are reference values. when using them, make sure values are confirmed carefully before being set. 4 .com u datasheet
BH3865S video ics ! ! ! ! application example 2 1 v cc i 2 c bus serial control 32 1 17 16 31 30 29 28 27 26 25 24 23 22 21 20 19 18 2 3 4 5 6 7 8 9 10 11 12 13 14 15 vca agc mix off mix on bass off surr effect on off on off on off on son off on sste loop smon l + r phase shift l + s 10k 10k 10k 10k 50k 50k 10k 50k 50k 50k 50k 10k 10k vca r - s l - r lfp amp v cc v cc scl sda 15k 100k 220k 4.7k 10 10 0.1 100 0.0056 18k v cc 4.7 4.7 fig.3 4.7 4.7 470p 0.033 v cc l in r in v cc gnd agcadj add ls1 b in ls2 ms in s out bgain ps stt v ref lt stb lb rt rb r out l out srv slv scl dac sda 10 10 100 47k 10k 10k 100k 100k 100k 10 10 0.039 0.022 0.022 10 0.012 10 2k 4.7 470p 0.033 10 units resistance : ? capacitance : f addition volume volume addition volume volume i 2 c bus interface a g c tone (bass/treble) tone (bass/treble) ! ! ! ! operation notes (1) operating power supply voltage range within the operating power supply voltage range, operation of the basic circuit functions is guaranteed for the ambient operating temperature, but when using the product, be sure that settings for constants and elements, voltage settings, and temperature settings are carefully confirmed. (2) operating temperature within the recommended operating voltage range, operation of the circuit functions is guaranteed for the operating temperature range. be aware that power dissipation conditions are related to the temperature. also, except for conditions determined by electrical characteristics within this range, the rated values for electrical characteristics cannot be guaranteed, but the essential functions are maintained. (3) application example we guarantee the application circuit design, but recommend that you thoroughly check its characteristics in actual use. if you change any of the external component values, check both the static and transient characteristics of the circuit, and allow sufficient margin in your selections to take into account variations in the components and ics. note that rohm has not fully investigated patent rights regarding this product. 4 .com u datasheet
BH3865S video ics (4) bass filter for tone control 2 1 v cc 2 1 v cc gnd v cc fig.4 30k r 1 c 1 5k 25k rb and lb pins 1 f c1 = = 2 c 1 r 1 1 2 c 1 30k ? determining cutoff frequencies at a frequency of f c1 , the lpf will be ? 3db. (5) treble filter for tone control gnd v cc 30k r 2 c 2 lpf rt and lt pins fig.5 hpf configuration 2 1 v cc f c2 = = 2 c 2 r 2 1 2 c 2 30k 1 (6) setting the agc level the agc level is set by the voltage divider between voltage v cc and gnd. a gain of 0db voltage should be used in the range of 100mvrms to 400mvrms. 0.001 1 0.1 0.01 10 0.001 0.01 0.1 1 10 gain 0db voltage vcc=9v agcadj voltage=4.1v lr common-mode input agc off agc on output voltage (v rms) input voltage (v rms) fig.6 (reference data) agc characteristic 600 500 400 300 200 100 0 2 2.5 3 3.5 4 4.5 5 [3pin] v cc =9v lr same-phase input gain 0db voltage (vrms) agcadj voltage (v) fig.7 (reference data) relation between agcadj voltage and gain 0db voltage 4 .com u datasheet
BH3865S video ics (7) determining the external ls1 (pin 4) and ls2 (pin 5) for the agc c 1 10 100k r 01 fig.8 suppressing phase detecting circuit ls1 430 r l1 4 ? attack time: r 01 c 1 ? recovery time: r l1 c 1 c 2 4.7 220k r 02 ls2 20k r l2 fig.9 amplifying phase detection circuit 5 ? attack time: r 02 c 2 ? recovery time: r l2 c 2 the attack and recovery times should be determined based on the internal resistors in the ic and on the external capacitor and resistor. the internal resistors are r 01 = 430 ? and r 02 = 20k ? (typ.). reducing the constant of the c 2 = capacitor of ls2 shifts the point where amplification begins in the direction of a lower input voltage. the distortion ratio changes as well, in the direction of worse distortion. reducing the constant of the c 1 capacitor of ls1 causes worse distortion. increasing the resistance value of r l1 causes the amount of suppression to decrease. (8) attachment of external sout (pin 6) of surround section l.p.f. c 10k fig.10 s out r 1 r 2 0.0056 4.7k 6 amplifier which determines level of surround effect f 1 = 2 cr 2 1 f 2 = 2 c (r 1 + r 2 ) 1 a 1 = r 1 + r 2 r 2 a 2 = 1 a 2 a 1 fig.11 f 1 f 2 gain (db) frequency (hz) (9) external ps (pin 7) of the phase shifter c 1 r 2 18k 18k fig.12 r 3 r 1 18k 0.1 7 the resistance in the ic is 18k ? (typ.). = -2tan -1 (2 fr 1 c 1 ) 4 .com u datasheet
BH3865S video ics (10) surround and pseudo-stereo effects 1) surround ? t : time of delay caused by phase shifter p : amount attenuated at phase shifter stage e : amount of surround effect 32 20 l out = l + ? t (l r) ep lch ? t p e fig.13 r out = r + ? t (r l) ep rch 12 1 lpf effect adjustment phase shifter l ? r 2) pseudo-stereo effect 32 20 l out = l + ? t (l + r) ep lch ? t p fig.14 e r out = r ? t (l + r) ep rch 12 1 lpf bpf effect adjustment phase shifter l+r configured externally the internal blocks in the ic for the surround and pseudo-stereo effects are configured as shown above. the feeling of the surround location and the stereo feeling of the pseudo-stereo effect can be changed by varying the amount of the effect. also, the loop switch can be turned on to create a pseudo-increase in the number of phase shifter stages. raising the gain of the effect level with the loop switch on causes instability, however, so the level of the effects should be kept at around 6db or below. in order to prevent a popping sound when switching between the surround and pseudo-stereo effects, the switch on the stereo surround side of the sste should be left in the on position. (11) the level of the surround effect the level of the surround effect can be varied between 0 and 15db, using i 2 c bus data. please be aware, however, that this gain is not the total gain between input and output. in precise terms, it specifies the effect level control range of the surround signal for the sout pin. (with single-side input and the stereo / surround effects: v cc = 9v, f = 1khz, v in = 100mvrms, ta = 25 c.) (12) pin 17 (dac) output setting the dac command for the i 2 c bus to high enables 5v output, and setting it to low enables 0v output. 4 .com u datasheet
BH3865S video ics (13) bass command creating an external lpf with the signals (l + r) output from add (pin 29) and inputting those signals to bin (pin 28) enables configuration of a low-pitch amplification circuit. this switch serves as the i 2 c bus bass command. the gain for the amplifier can be set through the external resistance, using bgain (pin 26). 10k b in r 1 bass sw 10 fig.15 1 2 v cc 50k 28 26 gain = 20log 10k + r 1 r 1 (14) noise when the step is switched in the application circuit example, using the srv, slv, scv, stb, and stt pins as an example, constants are provided for each. these constants change depending on the signal level setting, the m ounting wiring pattern, and other factors. careful consideration should be given to the constants before they are determined. an internal equivalent circuit is shown below. (a primary integration circuit is set, so that changes are implemented slowly.) c r each pin fig.16 (external) srv, slv, stb, stt 30 r value (k ? ) (15) level settings for volume and tone in this databook, values are noted for the control serial data in relation to the amount of attenuation or gain, as data in relation to the amount of attenuation or gain, as reference values. since the internal d / a converter is configured on the r?2r system, data exists in locations where there are no continuous changes between one item of data and the next. this can be used where detailed settings are required. however, the volume must be set within eight bits (256 steps), and the tone within seven bits (64 + 1 step). (16) i 2 c bus control high-frequency digital signals are input to the scl and sda pins, so the wiring and wiring patterns must be arranged in such a way that they do not interfere with the analog signal system line. (17) power on reset when the power supply is turned on, an internal circuit carries out an initialization within the ic. when the power supply is turned on, the volume levels of the left, right, and center channels are set to ? , and the dac output (pin 17) is set to 0v. once it has been turned on, if the power supply is turned off and then immediately turned on again, if these is any residual load on the capacitor, there may be cases when the status described above does not occur. if this happens, operation should be carried out with the muting function on, until an i 2 c bus command is transmitted. 4 .com u datasheet
BH3865S video ics (18) vref (pin 8) capacitor a capacitance of 100 f is recommended for the power supply filter attached to vref. if this capacitance is set too low, the minimum attenuation level of the volume deteriorates. crosstalk also tends to deteriorate. the ic contains internal pre- charge and discharge circuits for the capacitor attached to vref. (19) excessive input step have been taken with this product to avoid a situation in which, if a signal is input which exceeds the maximum input voltage for the lin and rin pins, a rebound waveform is produced even if hard clipping of the output signal is implemented. consequently, these is no need to worry that the listener will hear distorted sound because of a rebound waveform. (20) relation with the bh3866as the BH3865S and bh3866as are pin compatible, and share some of the same selected address and data parameters for the i 2 c bus. therefore, the same substrates and software can be shared at the product planning stage. ! ! ! ! electrical characteristic curves quiescent current: i q (ma) power supply voltage: v cc (v) 0 56 7 8 910 5 10 15 20 25 30 35 40 45 50 fig.17 quiescent current vs. power supply voltage 0.01 0.05 0.1 0.5 1 10m 1 100m total harmonic distortion : thd (%) input voltage: v in (vrms) v cc =9v f=1khz fig.18 total harmonic distortion vs. input voltage ? 40 ? 32 ? 28 ? 24 ? 20 ? 16 ? 12 ? 8 ? 4 + 0 ? 36 10 100 1k 10k 100k output voltage : v out (dbv) frequency : f (hz) v cc =9v v in =100mv rms during boost during cut fig.19 output gain vs. frequency ! ! ! ! external dimensions (units : mm) 4.7 0.3 0.51min. 8.4 0.3 3.2 0.2 32 116 17 0.5 0.1 0.3 0.1 28.0 0.3 0 ~ 15 10.16 1.778 sdip32 4 .com u datasheet

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